abs access after alias all and architecture array assert attribute begin BIT BIT_VECTOR block body BOOLEAN buffer bus case Character component configuration constant disconnect downto else elsif end entity exit file for function generate generic group guarded if impure in inertial inout Integer is label library linkage literal loop map mod nand NATURAL new next nor not null of on open or others out package port POSITIVE postponed procedure process pure range REAL record register reject rem report return rol ror select severity shared signal sla sll sra srl String subtype then TIME to transport type unaffected units until use variable wait when while with xnor xor